NIRF INFORMATION

Dr. Sheikh Wasmir Hussain
Dr. Sheikh Wasmir Hussain Assistant Professor
Ph.D. (NIT Meghalaya)

Department of Electronics & Communication Engineering
About

Welcome to my workplace! I’m an Assistant Professor in the Department of Electronics and Communication Engineering (ECE) at IIIT Guwahati.

  • Joined IIIT Guwahati, Guwahati, India in August 2023
  • Served as a Senior Research Scientist in the MeLoDe (Memory Logic Devices & Logic Design) Laboratory, Dept. of Electrical Engineering,  IIT Bombay, from October 2021 to August 2023
  • Completed Ph.D. (VLSI Design), Thesis on High Performance Content Addressable Memory, in March 2022, from Dept. of Electronics and Communication Engineering (ECE), NIT Meghalaya
  • Obtained M.Tech (ECE - VLSI Design) from NIT Meghalaya
  • Earned B.E. (ECE)  from NIE Mysore, under Visvesvaraya Technological University (VTU), Belagavi, India
  • Dropped out after 1st year from B.Sc. (Hons.) in Mathematics, at University of Delhi (DU), New Delhi, India

Research Interests

Area of Research
  • Semiconductor Memories 
  • CMOS Digital Circuit Techniques
  • Low Power VLSI Design
  • Secure ASIC Circuits
Research Profile Link

Reviewer for Journals/Conferences

  • Institute of Electrical and Electronics Engineers (IEEE)
    • IEEE Transactions on Circuits and Systems I, Regular Papers

    • Springer Nature 
      • The Journal of Supercomputing
      • Discover Electronics
    • Others
      • World Scientific Publishing: Journal of Circuits, Systems and Computers
      • Taylor & Francis: Institution of Electronics and Telecommunication Engineers (IETE) Journal of Research
      • 39th International Conference On VLSI Design (VLSID)

    Institute Responsibility

    • Academic/Faculty Advisor, B.Tech (ECE) and M.Tech (VLSI & Embedded System), IIIT Guwahati, January 2024 to Till Date
    • Associate Sports Co-ordinator, IIIT Guwahati, April 2024 to November 2025
    • Member of Faculty Advisory Board, IIIT Guwahati, April 2024 to November 2025
    • M.Tech (ECE) Admission Co-ordinator, VLSI & Embedded System, IIIT Guwahati, June to August 2024
    • Member of Committee, Proposal of New Courses/Specializations for M.Tech (ECE) Program, IIIT Guwahati, September 2025 to Till Date
    • Marshall , Graduating B.Tech Batches (2024, 2025), 6th and 7th Convocations, IIIT Guwahati
    • Co-ordinator & Panel Member, B.Tech & M.Tech Dissertations & Theses, Since  August 2023 to Till Date

    Tapeout Work

    • Associated with MeLoDe Lab, IIT Bombay: One time programmable (OTP) memory, physical unclonable function (PUF) and secure circuits in SCL 180-nm technology [Role: Circuit Verification & Layout Design]
    •  Associated with Research Lab, NIT Meghalaya: Pre-charge free dynamic content addressable memory in SCL 180-nm technology [Role: Circuit Verification & Layout Design]

    Invited Talk

    • Invited Talk on "Content Addressable Memory: A Design Perspective From Exact to Approximate Searching Architecture", Workshop on Emerging Cutting Edge Technologies in CMOS: Trends and Challenges, Dec. 11 –  15, 2024, NIT Silchar, Silchar.
    • Expert Speaker on "Cadence Tutorial", Accelerate Vigyan SERB Workshop on Custom IC Design using EDA, Feb. 27 – Mar. 5, 2022, IIIT Pune, Pune.
    • Invited Talk on "Low-Power and High-Speed Nanometer-CMOS CAMs", Faculty Development Program (FDP), Apr. 26 – May 8, 2021, GITA Autonomous College, Bhubaneshwar.

    Teaching

    At IIIT Guwahati, I teach the following Undergraduate & Postgraduate Courses: 

    • Theory
      • Basic Electronic Circuits (Winter 2023-24, 2024-25, 2025-26)
      • Digital Design (Monsoon 2024-25, 2025-26)
      • Analog Circuits (Monsoon 2024-25, 2025-26)
    • Tutorial 
      • Electrical Circuit Analysis Tutorial (Monsoon 2022-23)
    • Laboratory
      • Analog Integrated Circuit (Monsoon 2022-23)
      • Digital Design (Monsoon 2023-24, 2024-25, 2025-26)
      • Embedded Systems Laboratory (Winter 2023-24, 2024-25, 2025-26)                                                                                 
    • Seminar
      • M. Tech ECE & CSE Seminar (Monsoon 2022-23)

      [Course Details Can be Found in GitHUB Link]

      Supervision (Thesis & Dissertation)

      Doctoral (Ph.D.)
      • Mr. Arnav Banerjee
        • Ongoing Since February 2024; Completed State-of-the-Art
        • Research Area: Low-Power and/or High-Speed Associative Memory for Data Processing and In-Memory Computing Applications

        Post-Graduate (M.Tech) 
        • Mr. Saphaba Yambem (2024-26 Batch) 
          • Thesis Ongoing: Towards Precharge – Free Content Addressable Memory (CAM)
        • Mr. Mamun Mansur (2024-26 Batch) 
          • Thesis Ongoing: Data Compression using Associative Memory (AM)
        • Ms. Priyanshi Malviya (2023-25 Batch) 
          • Thesis Completed: A Low Power SRAM Based CAM For Networking Applications
          • Currently a Ph.D. Scholar at Dept. of Electrical Engineering, IIT Gandhinagar
        • Mr. Jayabrata Chakraborty (2023-25 Batch) 
          • Thesis Completed: High-Speed Associative Memory Based on Selective-charging Match-Line Scheme
          • Currently a Layout Engineer at Youzentech Technologies, Bangaluru

          Undergraduate (B.Tech)
          • Ms. K. Shreeja (2023-27 Batch) 
            • Tentative Dissertation Topic: Semiconductor Memory Design

            • Mr. Ayush Kumar Patel (2023-27 Batch) 
              • Tentative Dissertation Topic:  Digital Circuit Design
            • Mr. Bheemuni Harshavardhan Reddy (2022-26 Batch) 
              • Dissertation Ongoing: Ternary Logic Based Combinational Circuit Designs 
              • Dissertation Completed:  Memristor-Based Performance-Efficient Combinational Circuit Designs
              • Currently as DFX Verification Engineering Intern at Benaka Consulting Services Pvt. Ltd. (BCSPL)

              • Mr. Shivendu Chourasia (2022-26 Batch) 
                • Dissertation Ongoing: From 6T Static Random Access Memory (SRAM Cell) to Memory Array: Stability, PVT, and Read/Write Performance Analysis

                • Mr. Podili Manikanta  (2022-26 Batch) 
                  • Dissertation Ongoing: Low-Power Contention-Free Single-Phase Split-Controlled Flip-Flop (SCFF) Design

                  • Mr. Banoth Siddartha  (2022-26 Batch) 
                    • Dissertation Ongoing: Design and Analysis of Conventional and Multi-Transistor SRAM Cells with Emphasis on Noise Margins and Read Disturbance

                    • Mr. Aayush Mishra (2021-25 Batch) 
                      • Dissertation Completed: An Exact Search Accelerator Based on Content Addressable Memory (CAM)
                      • Currently an MBA Student at IIFT Kolkata

                      • Mr. Arnav Das (2021-25 Batch) 
                        • Dissertation Completed: Content-Addressable Memory Using Single Search-Line/Bit-Line Core Cell

                        • Mr. Sangam Chauhan (2021-25 Batch) 
                          • Dissertation Completed: High-Speed Associative Memory Based on Selective-Charging Match Line Scheme

                          Internship 
                          • Mr. Jayabrata Chakraborty  
                            • Topic: 8*4 Conventional CAM design
                            • Affiliation: M.Tech (VLSI), IIIT Guwahati
                            • Period: 11 May - 29 July, 2024

                            • Ms. Promita Das 
                              • Topic: CMOS Design Using Cadence
                              • Affiliation: B.Tech (ECE), Assam Don Bosco University
                              • Period: 8 July - 10 August, 2024

                            Achievement, Award & Fellowship

                            • Co-Coordinator in VLSI Test Workshop, IIIT Guwahati in collaboration with IEEE Test Technology Technical Community (TTTC) India, Mar. 7–Mar. 9, 2025, IIIT Guwahati, Guwahati. 
                            • Resource Person, Representation of R&D Works, G20 Research and Innovation Initiative Gathering (RIIG) Summit & Research Ministers’ Meeting, Jul. 2023, IIT Bombay, Mumbai.
                            • Resource Person, Representation of R&D Works,  India Semiconductor Mission’s Semicon India Conference, July 2023, Mahatma Mandir, Gandhinagar. 
                            • First Prize in Oral Presentation in Engineering Discipline, 2nd Research Conclave, Feb. 28–Mar. 1, 2021, NIT Meghalaya, Shillong.
                            • Among Top 12 Ph.D. Thesis Works in Student Research Form, 34th International Conference on VLSI Design & 20th International Conference on Embedded Systems 2021 (VLSID 2021), Feb. 20–24, 2021, India (Virtual).
                            • International Travel Support, from MeitY, Govt. of India for Presenting Research Paper at IEEE 6th International Conference on Engineering Technologies and Applied Sciences (ICETAS), Dec. 20–21, 2019, UTMKL, Kuala Lumpur.
                            • JRF and SRF, under NIT Meghalaya from MoE (then MHRD), Govt. of India, Fellowships during Ph.D., Jul. 2017–Jul. 2021.
                            • GATE Fellowship, under NIT Meghalaya from MoE (then MHRD), Govt. of India, Teaching Assistant during M.Tech, Jul. 2015 – May 2017.
                            • GATE-2015 Qualified, 6592 All India Rank (AIR) in ECE Discipline, 96.18 Percentile.
                            • Merit Cum Means (MCM) Scholarship, under Minority & OBC, Govt. of Manipur for Pursuing B.E., 2010 – 2013.
                            • AIEEE-2009 Qualified, 31579 AIR and 47 Manipur State Rank in OBC Category.
                            • Most Regular Student Award, 100% Attendance Record during Academic Session 2006–2007 at Herbert School, Imphal.
                            • Academic Prizes, Appreciations, and Awards from Various State Organizations, Manipur, India for merit in High School Board and Higher Secondary School Council Examinations, 2006–2008.

                            Publication