Dr. Arijit Nath Assistant Professor
PhD (IIT Guwahati) Department of Computer Science and Engineering- arijit@iiitg.ac.in
Joined the Institute in July 2023
About
I am an Assistant Professor in the Department of CSE at Indian Institute of Information Technology, Guwahati. I joined IIITG in July, 2023. I did B.Tech from National Institute of Technology, Silchar; M.Tech from Tezpur University and PhD from Indian Institute of Technology, Guwahati in 2013, 2016 and 2023, respectively. My area of research is computer architecture with a special interest in the emerging memory technologies. Apart from professional activities, I like to play sports like tennis, table tennis and badminton. I am also a sincere learner of yoga and meditation.
Research Interests
- Computer Architecture
- Emerging Memory Technologies
- Memory System Design
- Intermittent Computing
Teaching
At IIITG, I have taught the following courses:
- IT Workshop I (Java Programming)
- Computer Organization and Architecture
Supervision
PhD Supervision
- Mr. Chetan Kumar (Ongoing)
B.Tech Supervision
- Harsh Raj
- Jitendra Meena
Invited Talk
- Invited as a resource person to deliver a talk on "Latest Trends in CSE and its future prospects", at University of Science and Technology (USTM), Meghalaya.
- Invited as a resource person to deliver a talk on "Emerging Memory Technologies: Shaping the Next Era of Data Processing", at Girijananda Choudhury University, Assam
Achievements
- Manuscript titled "HiParEnc : An effective History based Partial Re-encryption strategy to improve lifetime of Non-Volatile Main Memory" was selected to present a poster at one of the Work-in-Progress (WIP) sessions at the 60th Design Automation Conference (DAC), July 9-13 in San Francisco, CA.
- Manuscript titled "CoSeP: Compression and Content-based Selection Procedure to improve lifetime of encrypted Non-Volatile Main Memories" was selected to present a poster at one of the Work-in-Progress (WIP) sessions at the 59th Design Automation Conference (DAC), July 10-14 in San Francisco, CA.
- Finalist of the Intel India Ph.D. fellowship, 2022.
- Finalist of the Qualcomm Innovation Fellowship for Ph.D, 2021.
- Presented poster titled "Reuse Distance based Victim Cache for effective Utilization of Hybrid Main Memory Systems" at ARCS 21, (ACM India Annual Event).
- Qualified AIEEE 2009 and GATE 2014.
- Rank Holder at 10th board (19th rank in the state) examination conducted by SEBA.
Publication
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Conference
- Arijit Nath and Harsh Raj, "Exploiting the Presence of Abundant Zero Data to Improve NVM Lifespan.", 26th IEEE International Symposium on Quality Electronic Design, ISQED 2025, (2025),
- Chetan Kumar and Arijit Nath, "RECminThrash: Recency and Eviction Count Based Cache Replacement Policy to Minimize Thrashing at the Last Level Caches", (2025), IEEE International Symposium on Quality Electronic Design, ISQED 2025, San Francisco
- Arijit Nath and Jitendra Meena, "Towards Harnessing the Potential of Compression and Encoding to Enhance NVM Lifespan", IEEE International Symposium on Smart Electronic Systems, iSES 2024, (2024),
- Nishant Bharti*, Arijit Nath* (* equal contribution), Swati Upadhyay and Hemangee K. Kapoor, "ZOCHEN: Compression using Zero chain elimination and encoding to improve endurance of Non-volatile Memories", IEEE International Symposium on Quality Electronic Design (ISQED), (2023),
- Arijit Nath and Hemangee K. Kapoor., "CoSeP: Compression and Content-based Selection Procedure to improve lifetime of encrypted Non-Volatile Main Memories", The ACM Great Lakes Symposium on VLSI (GLSVLSI), (2022), ACM
- Arijit Nath and Hemangee K. Kapoor, "WELCOMF: wear leveling assisted compression using frequent words in non-volatile main memories", ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), (2022),
- Arijit Nath, Manik B. Bhosle and H. K. Kapoor, "SeNonDiv: Securing Non-Volatile Memory using Hybrid Memory and Critical Data Diversion", 22nd International Symposium on Quality Electronic Design (ISQED), (2021),
- Arijit Nath and Hemangee K. Kapoor, "Write Variation aware Cache Partitioning for Improved Lifetime in Non-Volatile Caches", 32nd International Conference on VLSI Design (VLSID), (2019), IEEE
- AV Umdekar, A Nath, S Das, H.K Kapoor, "Dynamic thermal management by using task migration in conjunction with frequency scaling for chip multiprocessors", 31st International Conference on VLSI Design (VLSID), (2018), IEEE
- Swati Upadhyay, Arijit Nath and Hemangee K. Kapoor, "Exploiting Successive Identical Words and Differences with Dynamic Bases for Effective Compression in Non-Volatile Memories", (0),
Journal
- Swati Upadhyay, Arijit Nath, Hemangee K. Kapoor, "WEnSIBR: Compression using Dynamic Bases supported with Encoding and Zone Wise Wear Leveling for NVMs", Journal of Systems Architecture, (2025), elsevier
- Arijit Nath and Hemangee K. Kapoor, "AmLuCEP: Am algamating LU T-based C ompression and Adaptive Encoding Assisted Block P lacement To Improve Lifetime of PCM-based Main Memories", ACM Transactions on Design Automation of Electronic Systems, (2024), ACM
- Arijit Nath and Hemangee K. Kapoor, "Pop-Crypt : Identification and Management of Popular Words for Enhancing Lifetime of EnCrypted Non-Volatile Main Memories", IEEE Transactions on on Very Large Scale Integration, (2022),
- Arijit Nath and Hemangee K. Kapoor, "CADEN: Compression Assisted ADaptive Encoding to improve lifetime of Encrypted Non-Volatile Main Memories", IEEE Embedded Systems Letters, (2022),
- Arijit Nath and Hemangee K. Kapoor, "SWEL-COFAE : Wear Leveling and Adaptive Encoding Assisted Compression of Frequent Words in Non-Volatile Main Memories", IEEE Transactions on Computers, (2021),
- Arijit Nath, Sukarn Agarwal and Hemangee K. Kapoor, "Reuse Distance based Victim Cache for Effective Utilisation of Hybrid Main Memory System", ACM Transactions on Design Automation of Electronic Systems (TODAES), (2020), ACM
- Arijit Nath and Nityananda Sarma, "A distributed solution for cooperative spectrum sensing scheduling in multi-band cognitive radio networks", Journal of Network and Computer Applications, (2017), Elsevier