Hello, welcome to my home page. I am an Assistant Professor in the Department of CSE at Indian Institute of Information Technology, Guwahati. I joined IIITG in January, 2022.

Research Interests:

Computer Architecture, Logic Design using emerging memory technologies.


  1. P. L. Thangkhiew, A. Zulehner, R. Wille, K. Datta, I. Sengupta, ”An efficient memristor crossbar architecture for mapping Boolean functions using Binary Decision Diagrams (BDD)”, Integration, vol 71, pp. 125-133, Mar. 2020.
  2. P. L. Thangkhiew, R. Gharpinde and K. Datta, ”Efficient Mapping of Boolean Functions to MemristorCrossbar Using MAGIC NOR Gates,” in IEEE Transactions on Circuits and Systems I : Regular Papers, vol. 65, no. 8, pp. 2466-2476, Aug. 2018.
  3. P. L. Thangkhiew, K. Datta, ”Scalable in-memory mapping of Boolean functions in memristive crossbar array using simulated annealing,” in Journal of Systems Architecture, vol. 89, pp. 49-59, Sep. 2018.
  4. R. Gharpinde, P. L. Thangkhiew, K. Datta and I. Sengupta, ”A Scalable In-Memory Logic Synthesis Approach Using Memristor Crossbar,” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 26, no. 2, pp. 355-366, Feb. 2018.
  5. D. N. Yadav, P. L. Thangkhiew, K. Datta, ”Look-ahead mapping of Boolean functions in memristive crossbar array”, Integration, vol. 64, pp. 152-162, 2019
  1. P. L. Thangkhiew, R. Gharpinde, P. V. Chowdhary, K. Datta, and I. Sengupta. Area efficient implementation of ripple carry adder using memristor crossbar arrays. In 2016 11th International Design Test Symposium (IDT), Hammamet, Tunisia, pages 142-147, Dec. 2016.
  2. P. L. Thangkhiew, R. Gharpinde, D. N. Yadav, K. Datta, and Indranil Sen Gupta. Efficient implementation of adder circuits in memristive crossbar array. In TENCON 2017 - 2017 IEEE Region 10 Conference (TENCON 2017), Penang, Malaysia, pages 207-212, Nov. 2017.
  3. P. L. Thangkhiew and K. Datta, ”Fast In-Memory Computation of Boolean Functions in Memristive Crossbar Array,” 2018 8th International Symposium on Embedded Computing and System Design (ISED), Cochin, India, pages. 105-109, Dec. 2018.
  4. D. N. Yadav and P. L. Thangkhiew, ”Towards an In-Memory Reconfiguration of Arithmetic Logical Unit using Memristor Crossbar Array,” 2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), Bangalore, India, pages, 1-6, Mar. 2018

Dr. Phrangboklang Lyngton Thangkhiew

Assistant Professor (CSE)

PhD (NIT Meghalaya)